neuron-tai/.scratch/distributed-gguf-runtime/milestones.md

Distributed GGUF runtime milestones

The exact alpha target and immutable acceptance gates are defined in GLM-5.2-MAX-ALPHA-ROADMAP.md.

Completed foundation

• DGR-001 locks the safetensors-versus-GGUF performance/fit/quality contract. Its immutable CPU v1 verdict remains stop; separate ROCm evidence supports a fit-oriented investigation without rewriting CPU evidence.
• DGR-002 defines the backend-neutral gRPC/Protobuf Shard protocol.

Gate A — exact GLM-5.2 target and oracle

• DGR-017 locks official/GGUF revisions, UD-IQ1_S, hashes, resource accounting, Max-mode semantics, and alpha thresholds.
• DGR-003 builds exact recipe identity on DGR-002 and DGR-017.
• DGR-004 creates the reproducible pinned llama.cpp boundary after stock GLM behavior is measured.
• DGR-018 certifies one whole-model UD-IQ1_S oracle with real MoE, DSA, IndexShare, KV, and reasoning_effort=max semantics. Blocked (2026-07-14): requires a 256-GiB-class host (≥ 224 GiB runtime-accessible memory); see evidence/DGR-018/BLOCKED.md. DGR-019 and DGR-020 are blocked transitively.

Gate B — minimal native execution seam

• DGR-005 implements range-owned tensors using dense Llama as a cheap structural fixture.
• DGR-006 proves the generic named activation boundary and F32 correctness lane.
• DGR-019 implements explicit GLM-5.2 MoE/MLA/DSA/IndexShare/NextN range semantics and parity.

Gate C — native Meshnet route

• DGR-007 isolates Shard-local Hot KV State.
• DGR-008 exposes the native worker over gRPC.
• DGR-009 integrates the worker without replacing Meshnet's control plane.
• DGR-010 passes local real-model two-process acceptance.
• DGR-011 passes real two-physical-machine execution.
• DGR-013 supplies the cancellation/node-loss/restart/cleanup subset required by alpha.

Gate D — GLM-5.2 Max alpha verdict

• DGR-020 runs the exact UD-IQ1_S target across enough physical consumer nodes that no one node can admit the whole recipe.
• It produces an immutable alpha or stop verdict from target identity, native GLM semantics, parity, Max-mode usefulness, minimum speed, telemetry, failure, and cleanup evidence.
• Synthetic workers, layer-reduced fixtures, dense-attention fallbacks, and single-host execution cannot satisfy this gate.

Gate E — post-alpha product hardening

• DGR-012 adds continuous batching and bounded admission.
• DGR-014 compares distributed GGUF against the current reference route under locked thresholds.
• Longer contexts progress through 32K/128K/200K before 1M certification.
• MTP/speculative decoding and source-bound layer packages remain measured optimizations.
• DGR-016 prepares narrow upstream llama.cpp collaboration material.
• DGR-015 adds Qwen3/Qwen3-MoE only as later architecture expansion.

No later gate may be claimed from synthetic workers or documentation-only evidence. Model artifacts remain on mounted-drive storage and never under /home.