docs: harden GLM alpha resource and protocol gates
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@@ -88,6 +88,8 @@ Do not introduce another scheduler/control plane from vLLM, Nakshatra, prima.cpp
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15. Model artifacts must remain on mounted-drive storage and never under `/home`.
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16. Unified system RAM and integrated-GPU memory are one physical pool and must never be double-counted for admission.
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17. Alpha requires native GLM-5.2 MoE, DSA, and IndexShare semantics; MTP/speculative decoding and 1M-context certification are post-alpha.
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18. DGR-006 amends the decode fast path to carry a versioned `TensorBundle` and defines a typed tail logits/token result; the current single-`NamedTensor` fast path is insufficient for GLM sidebands.
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19. Alpha reserves at least `max(20% of physical usable memory, 8 GiB)` per node outside weight-plus-Q8-KV placement and uses a same-switch wired 2.5 GbE minimum route.
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Changing one of these requires an explicit ADR update and human review, not an incidental story implementation.
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@@ -215,7 +217,7 @@ Generated protobuf/C++ build outputs belong in build directories unless packagin
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| DGR-003 | exact runtime-recipe/fingerprint implementation and admission tests; `evidence/DGR-003/` |
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| DGR-004 | exact upstream pin, numbered patch series, reproducible fetch/apply/build smoke; `evidence/DGR-004/` |
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| DGR-005 | dense-Llama range ownership loader and memory evidence; `evidence/DGR-005/` |
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| DGR-006 | architecture boundary adapter/parity tests and results; `evidence/DGR-006/` |
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| DGR-006 | decode `TensorBundle` protocol amendment, typed tail-result contract, architecture boundary adapter/parity tests and results; `evidence/DGR-006/` |
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| DGR-007 | concurrent session/KV manager, isolation/cleanup tests; `evidence/DGR-007/` |
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| DGR-008 | standalone C++ gRPC worker, fake-model integration tests, lifecycle evidence; `evidence/DGR-008/` |
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| DGR-009 | Meshnet backend/registration/relay integration and tests; `evidence/DGR-009/` |
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