From ba1a3218dc41762898f2535b448022003eccff13 Mon Sep 17 00:00:00 2001 From: JayDDee Date: Wed, 28 Sep 2022 23:39:18 -0400 Subject: [PATCH] Updated Compiling from source (markdown) --- Compiling-from-source.md | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Compiling-from-source.md b/Compiling-from-source.md index d567577..477f99c 100644 --- a/Compiling-from-source.md +++ b/Compiling-from-source.md @@ -66,9 +66,15 @@ Ryzen 3000 uses "-march=znver2" natively but znver1 also works. Ryzen 5000 uses "-march=znver3" natively in gcc-11 and newer. For olders versions of gcc use "-march=znver2 -mvaes" -Ryzen 7000 uses "-march-znver4" but is not yet defined in gcc. It can be compiled with gcc-11 by using "-march=znver3 -mavx512f -mavx512dq -mavx512bw -mavx512vl" +Ryzen 7000 uses "-march-znver4" but is not yet supported as of gcc-12. It can be compiled with gcc-11 by using "-march=znver3 -mavx512f -mavx512dq -mavx512bw -mavx512vl" -Many examples for various CPU architectures can be found in file build-allarch.sh +Intel Alderlake removed support for AVX512 and is therefore not compatible with Rocketlake or Icelake. "march=alderlake" is supported in gcc-11, otherwise use the Skylake architecture, no additional options are needed. + +Raptorlake can use Alderlake until it's supported natively. + +New Intel Xeon CPUs are likely compatible with Rocketlake & Icelake builds if not directly supported by the compiler. Although Cascadelake is an HEDT architecture it doesn't include VAES and SHA which are included on all new CPUs and used by cpuminer-opt. YMMV. + +Many examples for various desktop CPU architectures can be found in file build-allarch.sh Additional instructions for static compilation can be found here at https://lxadm.com/Static_compilation_of_cpuminer Static builds should only considered in a homogeneous HW and SW environment.