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JayDDee
2020-03-01 21:00:55 -05:00
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@@ -469,10 +469,12 @@ Line 4: Extensions supported, to varying degrees, by the mining algorithm
Line 5: Extensions to be used in the current session Line 5: Extensions to be used in the current session
Hardware extensions are divided into 3 classes, SIMD, AES and SHA. There are multiple levels in each clash. Hardware extensions are divided into 3 classes, SIMD, AES and SHA. There are multiple levels in each clash.
Each provides additional CPU instructions and more complex operations. Each provides additional CPU instructions and more complex operations. Only the highest ranked feature in
each class is displayed although lower ranking features may also exist and be avaiable. Not all features
have significant improvements and not all combinations are avalable in binary format for Windows.
* SIMD vector support * SIMD vector support
SSE2: minimum for 128 bit integer vector support, first available on Intel core2. SSE2: minimum for 128 bit integer vector support, first available on Intel Core2.
SSSE3: Some additional instructions for 128 bit integer vectors, not very significant. SSSE3: Some additional instructions for 128 bit integer vectors, not very significant.
SSE4.2: More 128 bit vector instructions, also not very significant. SSE4.2: More 128 bit vector instructions, also not very significant.
AVX: Initial support for 256 bit vectors but no integer support. AVX: Initial support for 256 bit vectors but no integer support.
@@ -484,7 +486,7 @@ Each provides additional CPU instructions and more complex operations.
AES: basic hardware AES support performs AES operations with a single instruction, also requires SSE2, AES: basic hardware AES support performs AES operations with a single instruction, also requires SSE2,
first available on Intel Westmere. first available on Intel Westmere.
VAES: Vectored AES, supports 4 parallel AES operations with a single instruction, first available on Intel VAES: Vectored AES, supports 4 parallel AES operations with a single instruction, first available on Intel
Icelake. Icelake. Also requires AVX512F.
* SHA encryption and decryption, aka SHA_NI * SHA encryption and decryption, aka SHA_NI
SHA supports basic SHA-256 operations with a single instruction, also requires SSE2. First available SHA supports basic SHA-256 operations with a single instruction, also requires SSE2. First available