mirror of
https://github.com/JayDDee/cpuminer-opt.git
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626 lines
19 KiB
C
626 lines
19 KiB
C
#if !defined(SIMD_128_H__)
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#define SIMD_128_H__ 1
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#if defined(__SSE2__)
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//////////////////////////////////////////////////////////////////
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//
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// 128 bit SSE vectors
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//
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// SSE2 is generally required for full 128 bit support. Some functions
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// are also optimized with SSSE3 or SSE4.1.
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//
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// Do not call intrinsic _mm_extract directly, it isn't supported in SSE2.
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// Use mm128_extr macro instead, it will select the appropriate implementation.
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//
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// 128 bit operations are enhanced with uint128 which adds 128 bit integer
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// support for arithmetic and other operations. Casting to uint128_t is not
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// free but is sometimes the only way for certain operations.
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//
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// Constants are an issue with simd. Simply put, immediate constants don't
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// exist. All simd constants either reside in memory or a register and
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// must be loaded or generated at run time.
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//
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// Due to the cost of generating constants it is often more efficient to
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// define a local const for repeated references to the same constant.
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//
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// Some constant values can be generated using shortcuts. Zero for example
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// is as simple as XORing any register with itself, and is implemented
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// in the setzero instrinsic. These shortcuts must be implemented using ASM
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// due to doing things the compiler would complain about. Another single
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// instruction constant is -1, defined below. Others may be added as the need
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// arises. Even single instruction constants are less efficient than local
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// register variables so the advice above stands.
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//
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// One common use for simd constants is as a control index for some simd
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// instructions like blend and shuffle. The utilities below do not take this
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// into account. Those that generate a simd constant should not be used
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// repeatedly. It may be better for the application to reimplement the
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// utility to better suit its usage.
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#define m128_zero _mm_setzero_si128()
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static inline __m128i m128_one_128_fn()
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{
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register __m128i a;
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asm( "movq $1, %0\n\t"
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: "=x"(a) );
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return a;
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}
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#define m128_one_128 m128_one_128_fn()
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static inline __m128i m128_one_64_fn()
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{
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register uint64_t one = 1;
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register __m128i a;
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asm( "movq %1, %0\n\t"
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: "=x"(a)
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: "r"(one) );
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return _mm_shuffle_epi32( a, 0x04 );
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}
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#define m128_one_64 m128_one_64_fn()
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static inline __m128i m128_one_32_fn()
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{
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register uint32_t one = 1;
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register __m128i a;
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asm( "movd %1, %0\n\t"
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: "=x"(a)
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: "r"(one) );
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return _mm_shuffle_epi32( a, 0x00 );
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}
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#define m128_one_32 m128_one_32_fn()
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static inline __m128i m128_one_16_fn()
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{
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register uint32_t one = 0x00010001;
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register __m128i a;
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asm( "movd %1, %0\n\t"
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: "=x"(a)
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: "r"(one) );
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return _mm_shuffle_epi32( a, 0x00 );
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}
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#define m128_one_16 m128_one_16_fn()
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static inline __m128i m128_one_8_fn()
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{
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register uint32_t one = 0x01010101;
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register __m128i a;
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asm( "movd %1, %0\n\t"
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: "=x"(a)
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: "r"(one) );
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return _mm_shuffle_epi32( a, 0x00 );
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}
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#define m128_one_8 m128_one_8_fn()
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static inline __m128i m128_neg1_fn()
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{
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__m128i a;
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asm( "pcmpeqd %0, %0\n\t"
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: "=x"(a) );
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return a;
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}
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#define m128_neg1 m128_neg1_fn()
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// move uint64_t to low bits of __m128i, zeros the rest
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static inline __m128i mm128_mov64_128( uint64_t n )
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{
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register __m128i a;
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asm( "movq %1, %0\n\t"
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: "=x" (a)
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: "r" (n) );
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return a;
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}
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static inline __m128i mm128_mov32_128( uint32_t n )
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{
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register __m128i a;
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asm( "movd %1, %0\n\t"
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: "=x" (a)
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: "r" (n) );
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return a;
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}
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static inline uint64_t mm128_mov128_64( __m128i a )
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{
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register uint64_t n;
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asm( "movq %1, %0\n\t"
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: "=x" (n)
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: "r" (a) );
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return n;
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}
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static inline uint32_t mm128_mov128_32( __m128i a )
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{
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register uint32_t n;
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asm( "movd %1, %0\n\t"
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: "=x" (n)
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: "r" (a) );
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return n;
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}
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#if defined(__SSE41__)
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// alternative to _mm_set_epi64x, doesn't use mem,
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static inline __m128i m128_const_64( const uint64_t hi, const uint64_t lo )
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{
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register __m128i a;
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asm( "movq %2, %0\n\t"
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"pinsrq $1, %1, %0\n\t"
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: "=x"(a)
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: "r"(hi), "r"(lo) );
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return a;
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}
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static inline __m128i m128_const1_64( const uint64_t n )
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{
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register __m128i a;
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asm( "movq %1, %0\n\t"
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"pinsrq $1, %1, %0\n\t"
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: "=x"(a)
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: "r"(n) );
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return a;
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}
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#else
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// #define m128_one_128 _mm_set_epi64x( 0ULL, 1ULL )
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#define m128_const_64 _mm_set_epi64x
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#define m128_const1_64 _mm_set1_epi64x
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#endif
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//
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// Basic operations without equivalent SIMD intrinsic
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// Bitwise not (~v)
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#define mm128_not( v ) _mm_xor_si128( (v), m128_neg1 )
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// Unary negation of elements
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#define mm128_negate_64( v ) _mm_sub_epi64( m128_zero, v )
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#define mm128_negate_32( v ) _mm_sub_epi32( m128_zero, v )
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#define mm128_negate_16( v ) _mm_sub_epi16( m128_zero, v )
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// Add 4 values, fewer dependencies than sequential addition.
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#define mm128_add4_64( a, b, c, d ) \
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_mm_add_epi64( _mm_add_epi64( a, b ), _mm_add_epi64( c, d ) )
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#define mm128_add4_32( a, b, c, d ) \
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_mm_add_epi32( _mm_add_epi32( a, b ), _mm_add_epi32( c, d ) )
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#define mm128_add4_16( a, b, c, d ) \
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_mm_add_epi16( _mm_add_epi16( a, b ), _mm_add_epi16( c, d ) )
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#define mm128_add4_8( a, b, c, d ) \
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_mm_add_epi8( _mm_add_epi8( a, b ), _mm_add_epi8( c, d ) )
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#define mm128_xor4( a, b, c, d ) \
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_mm_xor_si128( _mm_xor_si128( a, b ), _mm_xor_si128( c, d ) )
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// This isn't cheap, not suitable for bulk usage.
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#define mm128_extr_4x32( a0, a1, a2, a3, src ) \
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do { \
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a0 = _mm_extract_epi32( src, 0 ); \
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a1 = _mm_extract_epi32( src, 1 ); \
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a1 = _mm_extract_epi32( src, 2 ); \
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a3 = _mm_extract_epi32( src, 3 ); \
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} while(0)
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// Horizontal vector testing
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#if defined(__SSE41__)
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#define mm128_allbits0( a ) _mm_testz_si128( a, a )
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#define mm128_allbits1( a ) _mm_testc_si128( a, m128_neg1 )
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#define mm128_allbitsne( a ) _mm_testnzc_si128( a, m128_neg1 )
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#define mm128_anybits0 mm128_allbitsne
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#define mm128_anybits1 mm128_allbitsne
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#else // SSE2
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// Bit-wise test of entire vector, useful to test results of cmp.
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#define mm128_anybits0( a ) (uint128_t)(a)
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#define mm128_anybits1( a ) (((uint128_t)(a))+1)
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#define mm128_allbits0( a ) ( !mm128_anybits1(a) )
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#define mm128_allbits1( a ) ( !mm128_anybits0(a) )
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#endif // SSE41 else SSE2
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//
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// Vector pointer cast
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// p = any aligned pointer
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// returns p as pointer to vector type
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#define castp_m128i(p) ((__m128i*)(p))
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// p = any aligned pointer
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// returns *p, watch your pointer arithmetic
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#define cast_m128i(p) (*((__m128i*)(p)))
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// p = any aligned pointer, i = scaled array index
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// returns value p[i]
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#define casti_m128i(p,i) (((__m128i*)(p))[(i)])
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// p = any aligned pointer, o = scaled offset
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// returns pointer p+o
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#define casto_m128i(p,o) (((__m128i*)(p))+(o))
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// SSE2 doesn't implement extract
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#if defined(__SSE4_1)
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#define mm128_extr_64(a,n) _mm_extract_epi64( a, n )
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#define mm128_extr_32(a,n) _mm_extract_epi32( a, n )
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#else
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// Doesn't work with register variables.
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#define mm128_extr_64(a,n) (((uint64_t*)&a)[n])
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#define mm128_extr_32(a,n) (((uint32_t*)&a)[n])
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#endif
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// Gather and scatter data.
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// Surprise, they don't use vector instructions. Several reasons why.
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// Since scalar data elements are being manipulated scalar instructions
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// are most appropriate and can bypass vector registers. They are faster
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// and more efficient on a per instruction basis due to the higher clock
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// speed and greater avaiability of execution resources. It's good for
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// interleaving data buffers for parallel processing.
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// May suffer overhead if data is already in a vector register. This can
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// usually be easilly avoided by the coder. Sometimes _mm_set is simply better.
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// These macros are likely to be used when transposing matrices rather than
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// conversions of a single vector.
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// Gather data elements into contiguous memory for vector use.
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// Source args are appropriately sized value integers, destination arg is a
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// type agnostic pointer.
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// Vector alignment is not required, though likely. Appropriate integer
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// alignment satisfies these macros.
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// rewrite using insert
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#define mm128_gather_64( d, s0, s1 ) \
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((uint64_t*)d)[0] = (uint64_t)s0; \
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((uint64_t*)d)[1] = (uint64_t)s1;
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#define mm128_gather_32( d, s0, s1, s2, s3 ) \
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((uint32_t*)d)[0] = (uint32_t)s0; \
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((uint32_t*)d)[1] = (uint32_t)s1; \
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((uint32_t*)d)[2] = (uint32_t)s2; \
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((uint32_t*)d)[3] = (uint32_t)s3;
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// Scatter data from contiguous memory.
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#define mm128_scatter_64( d0, d1, s ) \
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*( (uint64_t*)d0) = ((uint64_t*)s)[0]; \
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*( (uint64_t*)d1) = ((uint64_t*)s)[1];
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#define mm128_scatter_32( d0, d1, d2, d3, s ) \
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*( (uint32_t*)d0) = ((uint32_t*)s)[0]; \
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*( (uint32_t*)d1) = ((uint32_t*)s)[1]; \
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*( (uint32_t*)d2) = ((uint32_t*)s)[2]; \
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*( (uint32_t*)d3) = ((uint32_t*)s)[3];
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// Memory functions
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// Mostly for convenience, avoids calculating bytes.
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// Assumes data is alinged and integral.
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// n = number of __m128i, bytes/16
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// Memory functions
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// Mostly for convenience, avoids calculating bytes.
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// Assumes data is alinged and integral.
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// n = number of __m128i, bytes/16
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static inline void memset_zero_128( __m128i *dst, const int n )
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{ for ( int i = 0; i < n; i++ ) dst[i] = m128_zero; }
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static inline void memset_128( __m128i *dst, const __m128i a, const int n )
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{ for ( int i = 0; i < n; i++ ) dst[i] = a; }
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static inline void memcpy_128( __m128i *dst, const __m128i *src, const int n )
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{ for ( int i = 0; i < n; i ++ ) dst[i] = src[i]; }
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//
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// Bit rotations
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// AVX512 has implemented bit rotation for 128 bit vectors with
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// 64 and 32 bit elements.
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//
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// Rotate each element of v by c bits
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#define mm128_ror_64( v, c ) \
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_mm_or_si128( _mm_srli_epi64( v, c ), _mm_slli_epi64( v, 64-(c) ) )
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#define mm128_rol_64( v, c ) \
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_mm_or_si128( _mm_slli_epi64( v, c ), _mm_srli_epi64( v, 64-(c) ) )
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#define mm128_ror_32( v, c ) \
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_mm_or_si128( _mm_srli_epi32( v, c ), _mm_slli_epi32( v, 32-(c) ) )
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#define mm128_rol_32( v, c ) \
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_mm_or_si128( _mm_slli_epi32( v, c ), _mm_srli_epi32( v, 32-(c) ) )
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#define mm128_ror_16( v, c ) \
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_mm_or_si128( _mm_srli_epi16( v, c ), _mm_slli_epi16( v, 16-(c) ) )
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#define mm128_rol_16( v, c ) \
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_mm_or_si128( _mm_slli_epi16( v, c ), _mm_srli_epi16( v, 16-(c) ) )
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//
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// Rotate vector elements accross all lanes
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#define mm128_swap_64( v ) _mm_shuffle_epi32( v, 0x4e )
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#define mm128_ror_1x32( v ) _mm_shuffle_epi32( v, 0x39 )
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#define mm128_rol_1x32( v ) _mm_shuffle_epi32( v, 0x93 )
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#if defined (__SSE3__)
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// no SSE2 implementation, no current users
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#define mm128_ror_1x16( v ) \
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_mm_shuffle_epi8( v, m128_const_64( 0x01000f0e0d0c0b0a, \
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0x0908070605040302 ) )
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#define mm128_rol_1x16( v ) \
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_mm_shuffle_epi8( v, m128_const_64( 0x0d0c0b0a09080706, \
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0x0504030201000f0e ) )
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#define mm128_ror_1x8( v ) \
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_mm_shuffle_epi8( v, m128_const_64( 0x000f0e0d0c0b0a09, \
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0x0807060504030201 ) )
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#define mm128_rol_1x8( v ) \
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_mm_shuffle_epi8( v, m128_const_64( 0x0e0d0c0b0a090807, \
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0x060504030201000f ) )
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#endif // SSE3
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// Rotate 16 byte (128 bit) vector by c bytes.
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// Less efficient using shift but more versatile. Use only for odd number
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// byte rotations. Use shuffle above whenever possible.
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#define mm128_bror( v, c ) \
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_mm_or_si128( _mm_srli_si128( v, c ), _mm_slli_si128( v, 16-(c) ) )
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#define mm128_brol( v, c ) \
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_mm_or_si128( _mm_slli_si128( v, c ), _mm_srli_si128( v, 16-(c) ) )
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//
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// Rotate elements within lanes.
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// Equivalent to mm128_ror_64( v, 32 )
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#define mm128_swap32_64( v ) _mm_shuffle_epi32( v, 0xb1 )
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// Equivalent to mm128_ror_64( v, 16 )
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#define mm128_ror16_64( v ) _mm_shuffle_epi8( v, \
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m128_const_64( 0x09080f0e0d0c0b0a, 0x0100070605040302 )
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#define mm128_rol16_64( v ) _mm_shuffle_epi8( v, \
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m128_const_64( 0x0dc0b0a09080f0e, 0x0504030201000706 )
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// Equivalent to mm128_ror_32( v, 16 )
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#define mm128_swap16_32( v ) _mm_shuffle_epi8( v, \
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m128_const_64( 0x0d0c0f0e09080b0a, 0x0504070601000302 )
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//
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// Endian byte swap.
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#if defined(__SSSE3__)
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#define mm128_bswap_64( v ) \
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_mm_shuffle_epi8( v, m128_const_64( 0x08090a0b0c0d0e0f, \
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0x0001020304050607 ) )
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#define mm128_bswap_32( v ) \
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_mm_shuffle_epi8( v, m128_const_64( 0x0c0d0e0f08090a0b, \
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0x0405060700010203 ) )
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#define mm128_bswap_16( v ) _mm_shuffle_epi8( \
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m128_const_64( 0x0e0f0c0d0a0b0809, 0x0607040502030001 )
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// 8 byte qword * 8 qwords * 2 lanes = 128 bytes
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#define mm128_block_bswap_64( d, s ) do \
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{ \
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__m128i ctl = m128_const_64( 0x08090a0b0c0d0e0f, 0x0001020304050607 ); \
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casti_m128i( d, 0 ) = _mm_shuffle_epi8( casti_m128i( s, 0 ), ctl ); \
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casti_m128i( d, 1 ) = _mm_shuffle_epi8( casti_m128i( s, 1 ), ctl ); \
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casti_m128i( d, 2 ) = _mm_shuffle_epi8( casti_m128i( s, 2 ), ctl ); \
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casti_m128i( d, 3 ) = _mm_shuffle_epi8( casti_m128i( s, 3 ), ctl ); \
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casti_m128i( d, 4 ) = _mm_shuffle_epi8( casti_m128i( s, 4 ), ctl ); \
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casti_m128i( d, 5 ) = _mm_shuffle_epi8( casti_m128i( s, 5 ), ctl ); \
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casti_m128i( d, 6 ) = _mm_shuffle_epi8( casti_m128i( s, 6 ), ctl ); \
|
|
casti_m128i( d, 7 ) = _mm_shuffle_epi8( casti_m128i( s, 7 ), ctl ); \
|
|
} while(0)
|
|
|
|
// 4 byte dword * 8 dwords * 4 lanes = 128 bytes
|
|
#define mm128_block_bswap_32( d, s ) do \
|
|
{ \
|
|
__m128i ctl = m128_const_64( 0x0c0d0e0f08090a0b, 0x0405060700010203 ); \
|
|
casti_m128i( d, 0 ) = _mm_shuffle_epi8( casti_m128i( s, 0 ), ctl ); \
|
|
casti_m128i( d, 1 ) = _mm_shuffle_epi8( casti_m128i( s, 1 ), ctl ); \
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|
casti_m128i( d, 2 ) = _mm_shuffle_epi8( casti_m128i( s, 2 ), ctl ); \
|
|
casti_m128i( d, 3 ) = _mm_shuffle_epi8( casti_m128i( s, 3 ), ctl ); \
|
|
casti_m128i( d, 4 ) = _mm_shuffle_epi8( casti_m128i( s, 4 ), ctl ); \
|
|
casti_m128i( d, 5 ) = _mm_shuffle_epi8( casti_m128i( s, 5 ), ctl ); \
|
|
casti_m128i( d, 6 ) = _mm_shuffle_epi8( casti_m128i( s, 6 ), ctl ); \
|
|
casti_m128i( d, 7 ) = _mm_shuffle_epi8( casti_m128i( s, 7 ), ctl ); \
|
|
} while(0)
|
|
|
|
#else // SSE2
|
|
|
|
// Use inline function instead of macro due to multiple statements.
|
|
static inline __m128i mm128_bswap_64( __m128i v )
|
|
{
|
|
v = _mm_or_si128( _mm_slli_epi16( v, 8 ), _mm_srli_epi16( v, 8 ) );
|
|
v = _mm_shufflelo_epi16( v, _MM_SHUFFLE( 0, 1, 2, 3 ) );
|
|
return _mm_shufflehi_epi16( v, _MM_SHUFFLE( 0, 1, 2, 3 ) );
|
|
}
|
|
|
|
static inline __m128i mm128_bswap_32( __m128i v )
|
|
{
|
|
v = _mm_or_si128( _mm_slli_epi16( v, 8 ), _mm_srli_epi16( v, 8 ) );
|
|
v = _mm_shufflelo_epi16( v, _MM_SHUFFLE( 2, 3, 0, 1 ) );
|
|
return _mm_shufflehi_epi16( v, _MM_SHUFFLE( 2, 3, 0, 1 ) );
|
|
}
|
|
|
|
static inline __m128i mm128_bswap_16( __m128i v )
|
|
{
|
|
return _mm_or_si128( _mm_slli_epi16( v, 8 ), _mm_srli_epi16( v, 8 ) );
|
|
}
|
|
|
|
static inline void mm128_block_bswap_64( __m128i *d, const __m128i *s )
|
|
{
|
|
d[0] = mm128_bswap_64( s[0] );
|
|
d[1] = mm128_bswap_64( s[1] );
|
|
d[2] = mm128_bswap_64( s[2] );
|
|
d[3] = mm128_bswap_64( s[3] );
|
|
d[4] = mm128_bswap_64( s[4] );
|
|
d[5] = mm128_bswap_64( s[5] );
|
|
d[6] = mm128_bswap_64( s[6] );
|
|
d[7] = mm128_bswap_64( s[7] );
|
|
}
|
|
|
|
static inline void mm128_block_bswap_32( __m128i *d, const __m128i *s )
|
|
{
|
|
d[0] = mm128_bswap_32( s[0] );
|
|
d[1] = mm128_bswap_32( s[1] );
|
|
d[2] = mm128_bswap_32( s[2] );
|
|
d[3] = mm128_bswap_32( s[3] );
|
|
d[4] = mm128_bswap_32( s[4] );
|
|
d[5] = mm128_bswap_32( s[5] );
|
|
d[6] = mm128_bswap_32( s[6] );
|
|
d[7] = mm128_bswap_32( s[7] );
|
|
}
|
|
|
|
#endif // SSSE3 else SSE2
|
|
|
|
//
|
|
// Rotate in place concatenated 128 bit vectors as one 256 bit vector.
|
|
|
|
// Swap 128 bit vectorse.
|
|
|
|
#define mm128_swap128_256( v1, v2 ) \
|
|
v1 = _mm_xor_si128( v1, v2 ); \
|
|
v2 = _mm_xor_si128( v1, v2 ); \
|
|
v1 = _mm_xor_si128( v1, v2 );
|
|
|
|
// Concatenate v1 & v2 and rotate as one 256 bit vector.
|
|
#if defined(__SSE4_1__)
|
|
|
|
#define mm128_ror1x64_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 8 ); \
|
|
v1 = _mm_alignr_epi8( v2, v1, 8 ); \
|
|
v2 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x64_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 8 ); \
|
|
v2 = _mm_alignr_epi8( v2, v1, 8 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_ror1x32_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 4 ); \
|
|
v1 = _mm_alignr_epi8( v2, v1, 4 ); \
|
|
v2 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x32_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 12 ); \
|
|
v2 = _mm_alignr_epi8( v2, v1, 12 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_ror1x16_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 2 ); \
|
|
v1 = _mm_alignr_epi8( v2, v1, 2 ); \
|
|
v2 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x16_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 14 ); \
|
|
v2 = _mm_alignr_epi8( v2, v1, 14 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_ror1x8_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 1 ); \
|
|
v1 = _mm_alignr_epi8( v2, v1, 1 ); \
|
|
v2 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x8_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_alignr_epi8( v1, v2, 15 ); \
|
|
v2 = _mm_alignr_epi8( v2, v1, 15 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#else // SSE2
|
|
|
|
#define mm128_ror1x64_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_srli_si128( v1, 8 ) | _mm_slli_si128( v2, 8 ); \
|
|
v2 = _mm_srli_si128( v2, 8 ) | _mm_slli_si128( v1, 8 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x64_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_slli_si128( v1, 8 ) | _mm_srli_si128( v2, 8 ); \
|
|
v2 = _mm_slli_si128( v2, 8 ) | _mm_srli_si128( v1, 8 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_ror1x32_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_srli_si128( v1, 4 ) | _mm_slli_si128( v2, 12 ); \
|
|
v2 = _mm_srli_si128( v2, 4 ) | _mm_slli_si128( v1, 12 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x32_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_slli_si128( v1, 4 ) | _mm_srli_si128( v2, 12 ); \
|
|
v2 = _mm_slli_si128( v2, 4 ) | _mm_srli_si128( v1, 12 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_ror1x16_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_srli_si128( v1, 2 ) | _mm_slli_si128( v2, 14 ); \
|
|
v2 = _mm_srli_si128( v2, 2 ) | _mm_slli_si128( v1, 14 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x16_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_slli_si128( v1, 2 ) | _mm_srli_si128( v2, 14 ); \
|
|
v2 = _mm_slli_si128( v2, 2 ) | _mm_srli_si128( v1, 14 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_ror1x8_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_srli_si128( v1, 1 ) | _mm_slli_si128( v2, 15 ); \
|
|
v2 = _mm_srli_si128( v2, 1 ) | _mm_slli_si128( v1, 15 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#define mm128_rol1x8_256( v1, v2 ) \
|
|
do { \
|
|
__m128i t = _mm_slli_si128( v1, 1 ) | _mm_srli_si128( v2, 15 ); \
|
|
v2 = _mm_slli_si128( v2, 1 ) | _mm_srli_si128( v1, 15 ); \
|
|
v1 = t; \
|
|
} while(0)
|
|
|
|
#endif // SSE4.1 else SSE2
|
|
|
|
#endif // __SSE2__
|
|
#endif // SIMD_128_H__
|