mirror of
https://github.com/JayDDee/cpuminer-opt.git
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182 lines
6.9 KiB
C
182 lines
6.9 KiB
C
#if !defined(SIMD_UTILS_H__)
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#define SIMD_UTILS_H__ 1
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//////////////////////////////////////////////////////////////////////
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//
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// SIMD utilities
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//
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// Not to be confused with the hashing function of the same name. This
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// is about Single Instruction Multiple Data programming using CPU
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// features such as SSE and AVX.
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//
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// This header is the entry point to a suite of macros and functions
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// to perform basic operations on vectors that are useful in crypto
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// mining. Some of these functions have native CPU support for scalar
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// data but not for vectors. The main categories are bit rotation
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// and endian byte swapping
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//
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// An attempt was made to make the names as similar as possible to
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// Intel's intrinsic function format. Most variations are to avoid
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// confusion with actual Intel intrinsics, brevity, and clarity.
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//
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// This suite supports some operations on regular 64 bit integers
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// as well as 128 bit integers available on recent versions of Linux
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// and GCC.
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//
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// It also supports various vector sizes on CPUs that meet the minimum
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// requirements.
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//
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// The minimum for any real work is a 64 bit CPU with SSE2,
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// ie an the Intel Core 2.
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//
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// Following are the minimum requirements for each vector size. There
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// is no significant 64 bit vectorization therefore SSE2 is the practical
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// minimum for using this code.
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//
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// MMX: 64 bit vectors
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// SSE2: 128 bit vectors (64 bit CPUs only, such as Intel Core2.
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// AVX2: 256 bit vectors (Starting with Intel Haswell and AMD Ryzen)
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// AVX512: 512 bit vectors (Starting with SkylakeX)
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//
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// Most functions are avalaible at the stated levels but in rare cases
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// a higher level feature may be required with no compatible alternative.
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// Some SSE2 functions have versions optimized for higher feature levels
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// such as SSSE3 or SSE4.1 that will be used automatically on capable
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// CPUs.
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//
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// The vector size boundaries are respected to maintain compatibility.
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// For example, an instruction introduced with AVX2 may improve 128 bit
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// vector performance but will not be implemented. A CPU with AVX2 will
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// tend to use 256 bit vectors. On a practical level AVX512 does introduce
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// bit rotation instructions for 128 and 256 bit vectors in addition to
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// its own 5a12 bit vectors. These will not be back ported to replace the
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// SW implementations for the smaller vectors. This policy may be reviewed
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// in the future once AVX512 is established.
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//
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// Strict alignment of data is required: 16 bytes for 128 bit vectors,
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// 32 bytes for 256 bit vectors and 64 bytes for 512 bit vectors. 64 byte
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// alignment is recommended in all cases for best cache alignment.
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//
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// Windows has problems with function vector arguments larger than
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// 128 bits. Stack alignment is only guaranteed to 16 bytes. Always use
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// pointers for larger vectors in function arguments. Macros can be
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// used for larger value arguments.
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//
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// An attempt was made to make the names as similar as possible to
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// Intel's intrinsic function format. Most variations are to avoid
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// confusion with actual Intel intrinsics, brevity, and clarity
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//
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// The main differences are:
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//
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// - the leading underscore(s) "_" and the "i" are dropped from the
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// prefix of vector instructions.
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// - "mm64" and "mm128" used for 64 and 128 bit prefix respectively
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// to avoid the ambiguity of "mm".
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// - the element size does not include additional type specifiers
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// like "epi".
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// - some macros contain value args that are updated.
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// - specialized shift and rotate functions that move elements around
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// use the notation "1x32" to indicate the distance moved as units of
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// the element size.
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// - there is a subset of some functions for scalar data. They may have
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// no prefix nor vec-size, just one size, the size of the data.
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// - Some integer functions are also defined which use a similar notation.
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//
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// Function names follow this pattern:
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//
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// prefix_op[esize]_[vsize]
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//
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// Prefix: usually the size of the largest vectors used. Following
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// are some examples:
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//
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// u64: unsigned 64 bit integer function
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// i128: signed 128 bit integer function (rarely used)
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// m128: 128 bit vector identifier
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// mm128: 128 bit vector function
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//
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// op: describes the operation of the function or names the data
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// identifier.
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//
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// esize: optional, element size of operation
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//
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// vsize: optional, lane size used when a function operates on elements
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// of vectors within lanes of a vector.
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//
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// Ex: mm256_ror1x64_128 rotates each 128 bit lane of a 256 bit vector
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// right by 64 bits.
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//
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// Vector constants
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//
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// Vector constants are a big problem because they technically don't exist.
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// All vectors used as constants either reside in memory or must be genererated
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// at run time at significant cost. The cost of generating a constant
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// increases non-linearly with the number of vector elements. A 4 element
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// vector costs between 7 and 11 clocks to generate, an 8 element vector
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// is 15-25 clocks. There are also additional clock due to data dependency
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// stalls.
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//
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// Vector constants are often used as control indexes for permute, blend, etc,
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// where generating the index can be over 90% of the operation. This is
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// where the problem occurs. An instruction that only requires one to 3
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// clocks needs may times more just to build the index argument.
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//
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// There is very little a programmer can do to avoid the worst case scenarios.
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// Smaller integers can be merged to form 64 bit integers, and vectors with
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// repeated elements can be generated more efficiently but they have limited
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// benefit and limited application.
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//
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// If a vector constant is to be used repeatedly it is better to define a local
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// variable to generate the constant only once.
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//
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// If a sequence of constants is to be used it can be more efficient to
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// use arithmetic with already existing constants to generate new ones.
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//
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// ex: const __m512i one = _mm512_const1_64( 1 );
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// const __m512i two = _mm512_add_epi64( one, one );
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//
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//////////////////////////////////////////////////////////////////////////
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#include <inttypes.h>
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#include <x86intrin.h>
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#include <memory.h>
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#include <stdlib.h>
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#include <stdbool.h>
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// 64 and 128 bit integers.
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#include "simd-utils/simd-int.h"
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#if defined(__MMX__)
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// 64 bit vectors
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#include "simd-utils/simd-64.h"
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#if defined(__SSE2__)
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// 128 bit vectors
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#include "simd-utils/simd-128.h"
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#if defined(__AVX__)
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// 256 bit vector basics
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#include "simd-utils/simd-256.h"
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#if defined(__AVX2__)
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// Utilities that require AVX2 are defined in simd-256.h.
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// Skylake-X has all these
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#if defined(__AVX512F__) && defined(__AVX512VL__) && defined(__AVX512DQ__) && defined(__AVX512BW__)
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// 512 bit vectors
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#include "simd-utils/simd-512.h"
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#endif // AVX512
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#endif // AVX2
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#endif // AVX
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#endif // SSE2
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#endif // MMX
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#include "simd-utils/intrlv.h"
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#endif // SIMD_UTILS_H__
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