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v3.19.9
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@@ -442,8 +442,14 @@ static inline __m256i mm256_shuflr128_x8( const __m256i v, const int c )
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#define mm256_shuflr64_32 mm256_swap64_32
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#define mm256_shufll64_32 mm256_swap64_32
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//
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// Swap bytes in vector elements, endian bswap.
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// NOTE: _mm256_shuffle_epi8, like most shuffles, is restricted to 128 bit
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// lanes. AVX512, however, supports full vector 8 bit shuffle. The AVX512VL +
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// AVX512BW intrinsic _mm256_mask_shuffle_epi8 with a NULL mask, can be used if
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// needed for a shuffle that crosses 128 bit lanes. BSWAP doesn't therefore the
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// AVX2 version will work here. The bswap control vector is coded to work
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// with both versions, bit 4 is ignored in AVX2.
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// Reverse byte order in elements, endian bswap.
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#define mm256_bswap_64( v ) \
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_mm256_shuffle_epi8( v, \
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m256_const_64( 0x18191a1b1c1d1e1f, 0x1011121314151617, \
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