mirror of
https://github.com/JayDDee/cpuminer-opt.git
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v25.1
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Jay D Dee
@@ -1,193 +0,0 @@
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#if !defined(SIMD_64_H__)
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#define SIMD_64_H__ 1
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#if defined(__x86_64__) && defined(__MMX__)
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////////////////////////////////////////////////////////////////
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//
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// 64 bit MMX vectors.
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//
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// This code is not used anywhere annd likely never will. It's intent was
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// to support 2 way parallel hashing using MMX, or NEON for 32 bit hash
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// functions, but hasn't been implementedwas never implemented.
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//
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// MMX is being deprecated by compilers, all intrinsics will be converted to use SSE
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// registers and instructions. MMX will still be available using ASM.
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// For backward compatibility it's likely the compiler won't allow mixing explicit SSE
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// with promoted MMX. It is therefore preferable to implement all 64 bit vector code
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// using explicit SSE with the upper 64 bits being ignored.
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// Using SSE for 64 bit vectors will complicate loading arrays from memory which will
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// always load 128 bits. Odd indexes will need to be extracted from the upper 64 bits
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// of the even index SSE register.
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// In most cases the exiting 4x32 SSE code can be used with 2 lanes being ignored
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// making ths file obsolete.
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#define v64_t __m64
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#define v64u32_t v64_t
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#define v64_load _mm_load_si64
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#define v64_store _mm_store_si64
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#define v64_64(i64) ((__m64)(i64))
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#define v64_32 _mm_set1_pi32
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#define v64_16 _mm_set1_pi16
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#define v64_8 _mm_set1_pi8
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#define v64_add32 _mm_add_pi32
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#define v64_add16 _mm_add_pi16
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#define v64_add8 _mm_add_pi8
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#define v64_mul32 _mm_mullo_pi32
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#define v64_mul16 _mm_mullo_pi16
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// compare
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#define v64_cmpeq32 _mm_cmpeq_epi32
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#define v64_cmpeq16 _mm_cmpeq_epi16
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#define v64_cmpeq8 _mm_cmpeq_epi8
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#define v64_cmpgt32 _mm_cmpgt_epi32
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#define v64_cmpgt16 _mm_cmpgt_epi16
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#define v64_cmpgt8 _mm_cmpgt_epi8
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#define v64_cmplt32 _mm_cmplt_epi32
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#define v64_cmplt16 _mm_cmplt_epi16
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#define v64_cmplt8 _mm_cmplt_epi8
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// bit shift
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#define v64_sl32 _mm_slli_epi32
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#define v64_sl16 _mm_slli_epi16
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#define v64_sl8 _mm_slli_epi8
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#define v64_sr32 _mm_srli_epi32
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#define v64_sr16 _mm_srli_epi16
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#define v64_sr8 _mm_srli_epi8
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#define v64_sra32 _mm_srai_epi32
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#define v64_sra16 _mm_srai_epi16
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#define v64_sra8 _mm_srai_epi8
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#define v64_alignr8 _mm_alignr_pi8
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#define v64_unpacklo32 _mm_unpacklo_pi32
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#define v64_unpackhi32 _mm_unpackhi_pi32
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#define v64_unpacklo16 _mm_unpacklo_pi16
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#define v64_unpackhi16 _mm_unpacklhi_pi16
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#define v64_unpacklo8 _mm_unpacklo_pi8
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#define v64_unpackhi8 _mm_unpackhi_pi16
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// Pseudo constants
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#define v64_zero _mm_setzero_si64()
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#define v64_one_64 _mm_set_pi32( 0UL, 1UL )
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#define v64_one_32 v64_32( 1UL )
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#define v64_one_16 v64_16( 1U )
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#define v64_one_8 v64_8( 1U );
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#define v64_neg1 v64_32( 0xFFFFFFFFUL )
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#define casti_v64(p,i) (((v64_t*)(p))[(i)])
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// Bitwise not: ~(a)
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//#define mm64_not( a ) _mm_xor_si64( (__m64)a, m64_neg1 )
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#define v64_not( a ) ( (v64_t)( ~( (uint64_t)(a) ) )
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/*
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// Unary negate elements
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#define mm64_negate_32( v ) _mm_sub_pi32( m64_zero, v )
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#define mm64_negate_16( v ) _mm_sub_pi16( m64_zero, v )
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#define mm64_negate_8( v ) _mm_sub_pi8( m64_zero, v )
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*/
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static inline void v64_memset_zero( __m64 *dst, const int n )
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{ for ( int i = 0; i < n; i++ ) dst[i] = v64_zero; }
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static inline void v64_memset( __m64 *dst, const __m64 a, const int n )
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{ for ( int i = 0; i < n; i++ ) dst[i] = a; }
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static inline void v64_memcpy( __m64 *dst, const __m64 *src, const int n )
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{ for ( int i = 0; i < n; i ++ ) dst[i] = src[i]; }
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#define v64_or _mm_or_si64
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#define v64_and _mm_and_si64
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#define v64_xor _mm_xor_si64
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#define v64_andnot _mm_andnot_si64
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#define v64_xor3( v2, v1, v0 ) v64_xor( v2, v64_andnot( v1, v0 ) )
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#define v64_xorandnot( v2, v1, v0 ) v64_xor( v2, v64_andnot( v1, v0 ) )
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// Rotate bits in packed elements of 64 bit vector
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#define v64_rol64( a, n ) \
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_mm_or_si64( _mm_slli_si64( a, n ), \
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_mm_srli_si64( a, 64-(n) ) )
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#define v64_ror64( a, n ) \
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_mm_or_si64( _mm_srli_si64( a, n ), \
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_mm_slli_si64( a, 64-(n) ) )
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#define v64_rol32( a, n ) \
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_mm_or_si64( _mm_slli_pi32( a, n ), \
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_mm_srli_pi32( a, 32-(n) ) )
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#define v64_ror32( a, n ) \
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_mm_or_si64( _mm_srli_pi32( a, n ), \
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_mm_slli_pi32( a, 32-(n) ) )
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#define v64_rol16( a, n ) \
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_mm_or_si64( _mm_slli_pi16( a, n ), \
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_mm_srli_pi16( a, 16-(n) ) )
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#define v64_ror16( a, n ) \
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_mm_or_si64( _mm_srli_pi16( a, n ), \
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_mm_slli_pi16( a, 16-(n) ) )
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// Rotate packed elements accross lanes. Useful for byte swap and byte
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// rotation.
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#if defined(__SSE__)
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// Swap hi & lo 32 bits.
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#define v64_swap32( a ) _mm_shuffle_pi16( a, 0x4e )
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#define v64_shulfr16( a ) _mm_shuffle_pi16( a, 0x39 )
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#define v64_shufll16( a ) _mm_shuffle_pi16( a, 0x93 )
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// Swap hi & lo 16 bits of each 32 bit element
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#define v64_swap32_16( a ) _mm_shuffle_pi16( a, 0xb1 )
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#endif // SSE
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#if defined(__SSSE3__)
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// Endian byte swap packed elements
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#define v64_bswap32( v ) \
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_mm_shuffle_pi8( v, (__m64)0x0405060700010203 )
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#define v64_bswap16( v ) \
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_mm_shuffle_pi8( v, (__m64)0x0607040502030001 );
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// Rotate right by c bytes
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static inline v64_t v64_shuflr_x8( __m64 v, const int c )
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{ return _mm_alignr_pi8( v, v, c ); }
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#else
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#define v64_bswap32( v ) \
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_mm_set_pi32( __builtin_bswap32( ((uint32_t*)&v)[1] ), \
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__builtin_bswap32( ((uint32_t*)&v)[0] ) )
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#define v64_bswap16( v ) \
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_mm_set_pi16( __builtin_bswap16( ((uint16_t*)&v)[3] ), \
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__builtin_bswap16( ((uint16_t*)&v)[2] ), \
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__builtin_bswap16( ((uint16_t*)&v)[1] ), \
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__builtin_bswap16( ((uint16_t*)&v)[0] ) )
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#endif // SSSE3
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#define v64_blendv( v1, v0, mask ) \
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v64_or( v64_and( mask, v1 ), v64_andnot( mask, v0 ) )
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#endif // MMX
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#endif // SIMD_64_H__
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@@ -19,6 +19,9 @@ static inline uint64_t bswap_64( uint64_t a )
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return b;
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}
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// This produces warnings from clang, but its suggested workaround
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// "rev32 %w0, %w1\n\t" produced errors instead. GCC doesn't complain and
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// it works as is on both.
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static inline uint32_t bswap_32( uint32_t a )
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{
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uint32_t b;
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