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v25.6
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@@ -187,9 +187,21 @@
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// vzipq_u32 can do hi & lo and return uint32x4x2, no 64 bit version.
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// AES
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// consistent with Intel AES intrinsics, break up for optimizing
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#define v128_aesenc( v, k ) \
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v128_xor( k, vaesmcq_u8( vaeseq_u8( v, v128_zero ) ) )
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// xor key with result after encryption, x86_64 format.
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#define v128_aesencxor( v, k ) \
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v128_xor( vaesmcq_u8( vaeseq_u8( v, v128_zero ) ), k )
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// default is x86_64 format.
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#define v128_aesenc v128_aesencxor
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// xor key with v before encryption, arm64 format.
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#define v128_xoraesenc( v, k ) \
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vaesmcq_u8( vaeseq_u8( v, k ) )
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// xor v with k_in before encryption then xor the result with k_out afterward.
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// Uses the applicable optimization based on the target.
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#define v128_xoraesencxor( v, k_in, k_out ) \
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v128_xor( v128_xoraesenc( v, k_in ), k_out )
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#define v128_aesenc_nokey( v ) \
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vaesmcq_u8( vaeseq_u8( v, v128_zero ) )
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